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HD74AC157
Quad 2-Input Multiplexer
REJ03D0252-0200Z (Previous ADE-205-371 (Z)) Rev.2.00 Jul.16.2004
Description
The HD74AC157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The HD74AC157 can also be used as a function generator.
Features
* Outputs Source/Sink 24 mA * Ordering Information
Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) FP-16DAV TTP-16DAV FP RP T EL (2,000 pcs/reel) EL (2,500 pcs/reel) ELL(2,000 pcs/reel)
HD74AC157AFPEL SOP-16 pin (JEITA) HD74AC157TELL TSSOP-16 pin
HD74AC157ARPEL SOP-16 pin (JEDEC) FP-16DNV
Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code.
Pin Arrangement
S1 I0a 2 I1a 3 Za 4 I0b 5 I1b 6 Zb 7 GND 8 (Top view) 16 VCC 15 E 14 I0c 13 I1c 12 Zc 11 I0d 10 I1d 9 Zd
Rev.2.00, Jul.16.2004, page 1 of 7
HD74AC157
Logic Symbol
E S
I0a I1a I0b I1b I0c
I1c Iod I1d
Za
Zb
Zc
Zd
Pin Names
I0a to I0d I1a to I1d E S Za to Zd Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Outputs
Functional Description
The HD74AC157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-Low. when E is High, all of the outputs (Z) are forced Low regardless of all other inputs. The HD74AC157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E*(I1a*S + I0a*S) Zb = E*(I1b*S + I0b*S) Zc = E*(I1c*S + I0c*S) Zd = E*(I1d*S + I0d*S) A common use of the HD74AC157 is the moving of data from two groups of register to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The HD74AC157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
Truth Table
Inputs E H L L L L H: L: X: X H H L L High Voltage Level Low Voltage Level Immaterial S X X X L H I0 X L H X X I1 L L H L H Output Z
Rev.2.00, Jul.16.2004, page 2 of 7
HD74AC157
Logic Diagram
I0a I1a I0b I1b I0c I1c I0d I1d E S
Za
Zb
Zc
Zd
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Absolute Maximum Ratings
Item Supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or ground current per output pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ratings -0.5 to 7 -20 20 -0.5 to Vcc+0.5 -50 50 -0.5 to Vcc+0.5 50 50 -65 to +150 Unit V mA mA V mA mA V mA mA C VI = -0.5V VI = Vcc+0.5V VO = -0.5V VO = Vcc+0.5V Condition
Recommended Operating Conditions
Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Symbol VCC VI, VO Ta tr, tf Ratings 2 to 6 0 to VCC -40 to +85 8 V V C ns/V VCC = 3.0V VCC = 4.5 V VCC = 5.5 V Unit Condition
Rev.2.00, Jul.16.2004, page 3 of 7
HD74AC157
DC Characteristics
Item Symbol VIH Vcc (V) 3.0 4.5 5.5 VIL 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 VOL 5.5 3.0 4.5 5.5 3.0 4.5 Input leakage current Dynamic output current* Quiescent supply current IIN IOLD IOHD ICC 5.5 5.5 5.5 5.5 5.5 min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.58 3.94 4.94 -- -- -- -- -- -- -- -- -- -- Ta = 25C typ. 1.5 2.25 2.75 1.50 2.25 2.75 2.99 4.49 5.49 -- -- -- 0.002 0.001 0.001 -- -- -- -- -- -- -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.32 0.32 0.32 0.1 -- -- 8.0 Ta = -40 to +85C min. max. 2.1 -- 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.48 3.80 4.80 -- -- -- -- -- -- -- 86 -75 -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.37 0.37 0.37 1.0 -- -- 80 A mA mA A V VOUT = 0.1 V or VCC -0.1 V Unit Condition
Input Voltage
V
VOUT = 0.1 V or VCC -0.1 V
Output voltage
VOH
VIN = VIL or VIH IOUT = -50 A VIN = VIL or VIH IOH = -12 mA IOH = -24 mA IOH = -24 mA VIN = VIL or VIH IOUT = 50 A VIN = VIL or VIH IOL = 12 mA IOL = 24 mA IOL = 24 mA VIN = VCC or GND VOLD = 1.1 V VOHD = 3.85 V VIN = VCC or ground
*Maximum test duration 2.0 ms, one output loaded at a time.
AC Characteristics: HD74AC157
Ta = +25C CL = 50 pF Min Typ Max 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 7.0 5.5 6.5 5.0 7.0 5.5 6.5 5.5 5.0 4.0 5.0 4.0 11.5 9.0 11.0 8.5 11.5 9.0 11.0 9.0 8.5 6.5 8.0 6.5 Ta = -40C to +85C CL = 50 pF Min Max 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 13.0 10.0 12.0 9.5 13.0 10.0 12.0 9.5 9.0 7.0 9.0 7.0 ns ns ns ns ns ns
Item Propagation delay S to Zn Propagation delay S to Zn Propagation delay E to Zn Propagation delay E to Zn Propagation delay In to Zn Propagation delay In to Zn Note:
Symbol tPLH tPHL tPLH tPHL tPLH tPHL
VCC (V)*1 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0
Unit
1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V
Rev.2.00, Jul.16.2004, page 4 of 7
HD74AC157
Capacitance
Item Input capacitance Power dissipation capacitance Symbol CIN CPD 4.5 50.0 Typ pF pF Unit VCC = 5.5 V VCC = 5.0 V Condition
Rev.2.00, Jul.16.2004, page 5 of 7
HD74AC157
Package Dimensions
As of January, 2003
10.06 10.5 Max 16 9
5.5
Unit: mm
1
*0.20 0.05
8
0.80 Max
2.20 Max
0.20 7.80 + 0.30 -
1.15
1.27
0.10 0.10
0 - 8
0.70 0.20
*0.40 0.06
0.15
0.12 M
Package Code JEDEC JEITA Mass (reference value) FP-16DAV -- Conforms 0.24 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
9.9 10.3 Max 16 9
3.95
1 1.27 0.635 Max
8
0.11 0.14 + 0.04 - 1.75 Max
*0.20 0.05
0.10 6.10 + 0.30 -
1.08
0 - 8
+ 0.67 0.60 - 0.20
*0.40 0.06
0.15 0.25 M
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
FP-16DNV Conforms Conforms 0.15 g
Rev.2.00, Jul.16.2004, page 6 of 7
HD74AC157
As of January, 2003
Unit: mm
5.00 5.30 Max 16 9
4.40
1
*0.20 0.05
8 0.65 0.13 M 0.65 Max
*0.15 0.05
1.0 6.40 0.20 0 - 8 0.50 0.10
1.10 Max
0.10
0.07 +0.03 -0.04
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
TTP-16DAV -- -- 0.05 g
Rev.2.00, Jul.16.2004, page 7 of 7
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